Period of Grace: A New Paradigm for Efficient Soft Error Hardening

In late-age silicon, soft errors become an issue even for low-margin products. Since classical hardening techniques are associated with costs which may not be acceptable for such ICs, selective hardening which targets only a subset of all possible soft errors has been suggested. We propose a soft error selection method based on severity of an error’s impact on system behavior. Some soft errors disturb the system in an acceptable way; no hardening is required against such soft errors. We suggest a definition of “acceptable misbehavior” consisting of two conditions: First, the system must return to the fault-free state after a given number of cycles k, called period of grace. During the period of grace, the system is allowed to deviate from its reference behavior. However, the second condition demands that the system misbehavior during the period of grace is acceptable, i.e., the deviation from the reference behavior must be limited. The definition of the acceptable misbehavior requires application-specific information; it is related to the concepts of error tolerance and threshold testing. We propose a methodology for identifying soft errors which are acceptable with respect to the period of grace paradigm. We envision low-cost soft-error hardening methods which guarantee acceptable misbehavior according to the period of grace paradigm (lightweight fault tolerance) rather than ensure total correctness as current fault tolerance approaches do. We report on a first case study which is shown to have acceptable misbehavior for some of the soft errors even without such hardening.